? 2000 fairchild semiconductor corporation ds010260 www.fairchildsemi.com february 1990 revised august 2000 100314 low power quint differential line receiver 100314 low power quint differential line receiver general description the 100314 is a monolithic quint differential line receiver with emitter-follower outputs. an internal reference supply (v bb ) is available for single-ended reception. when used in single-ended operation the apparent input threshold of the true inputs is 25 mv to 30 mv higher (positive) than the threshold of the complementary inputs. unlike other f100k ecl devices, the inputs do not have input pull-down resis- tors. active current sources provide common-mode rejection of 1.0v in either the positive or negative direction. a defined output state exists if both inverting and non-inverting inputs are at the same potential between v ee and v cc . the defined state is logic high on the o a ?o e outputs. features 35% power reduction of the 100114 2000v esd protection pin/function compatible with 100114 voltage compensated operating range = ? 4.2v to ? 5.7v available to industrial grade temperature range (plcc package only) ordering code: devices also available in tape and reel. specify by appending the suffix letter ? x ? to the ordering code. logic symbol pin descriptions connection diagrams 24-pin dip/soic 28-pin plcc order number package number package description 100314sc m24b 24-lead small outline integrated circuit (soic), jedec ms-013, 0.300 wide 100314pc n24e 24-lead plastic dual-in-line package (pdip), jedec ms-010, 0.400 wide 100314QC v28a 28-lead plastic lead chip carrier (plcc), jedec mo-047, 0.450 square 100314qi v28a 28-lead plastic lead chip carrier (plcc), jedec mo-047, 0.450 square industrial temperature range ( ? 40 c to + 85 c) pin names description d a ? d e data inputs d a ? d e inverting data inputs o a ? o e data outputs o a ? o e complementary data outputs
www.fairchildsemi.com 2 100314 absolute maximum ratings (note 1) recommended operating conditions note 1: the ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum rating. the ? recommended operating conditions ? table will define the conditions for actual device operation. note 2: esd testing conforms to mil-std-883, method 3015. commercial version dc electrical characteristics (note 3) v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd, t c = 0 c to + 85 c note 3: the specified limits represent the ? worst case ? value for the parameter. since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. conditions for testing sho wn in the tables are cho- sen to guarantee operation under ? worst case ? conditions. storage temperature (t stg ) ? 65 c to + 150 c maximum junction temperature (t j ) + 150 c pin potential to ground pin (v ee ) ? 7.0v to + 0.5v input voltage (dc) v ee to + 0.5v output current (dc output high) ? 50 ma esd (note 2) 2000v case temperature (t c ) commercial 0 c to + 85 c industrial ? 40 c to + 85 c supply voltage (v ee ) ? 5.7v to ? 4.2v symbol parameter min typ max units conditions v oh output high voltage ? 1025 ? 955 ? 870 mv v in = v ih (max) loading with v ol output low voltage ? 1830 ? 1705 ? 1620 mv or v il (min) 50 ? to ? 2.0v v ohc output high voltage ? 1035 mv v in = v ih loading with v olc output low voltage ? 1610 mv or v il (max) 50 ? to ? 2.0v v bb output reference voltage ? 1380 ? 1320 ? 1260 mv i vbb = ? 250 a v diff input voltage differential 150 mv required for full output swing v cm common mode voltage v cc ? 2.0 v cc ? 0.5 v v ih single-ended guaranteed high signal for all input high voltage ? 1110 ? 870 mv inputs (with one input tied to v bb ) v bb (max) + v diff v il single-ended guaranteed low signal for all input low voltage ? 1830 ? 1530 mv inputs (with one input tied to v bb ) v bb (min) ? v diff i il input low current 0.50 av in = v il (min) i ih input high current 240 av in = v ih (max) , d a ? d e = v bb , d a ? d e = v il(min) i cbo input leakage current ? 10 av in = v ee , d a ? d e = v bb , d a ? d e = v il (min) i ee power supply current ? 60 ? 30 ma d a ? d e = v bb , d a ? d e = v il (min)
3 www.fairchildsemi.com 100314 commercial version (continued) dip ac electrical characteristics v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd soic and plcc ac electrical characteristics v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd note 4: maximum toggle frequency at which v oh and v ol dc specifications are maintained. note 5: maximum toggle frequency at which outputs maintain 150 mv swing. note 6: output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for any outputs w ithin the same pack- aged device. the specifications apply to any outputs switching in the same direction either high-to-low (t oshl ), or low-to-high (t oslh ), or in opposite directions both hl and lh (t ost ). parameters t ost and t ps guaranteed by design. note 7: all skews calculated using input crossing point to output crossing point propagation delays. symbol parameter t c = 0 ct c = + 25 ct c = + 85 c units conditions min max min max min max f maxfs toggle frequency 250 250 250 mhz (note 2) (full swing) f maxrs toggle frequency 700 700 700 mhz (note 3) (reduced swing) t plh propagation delay 0.65 1.90 0.65 2.00 0.70 2.00 ns t phl data to output figures 1, 2 t tlh transition time 0.35 1.20 0.35 1.20 0.35 1.20 ns t thl 20% to 80%, 80% to 20% symbol parameter t c = 0 ct c = + 25 ct c = + 85 c units conditions min max min max min max f maxfs toggle frequency 250 250 250 mhz (note 4) (full swing) f maxrs toggle frequency 700 700 700 mhz (note 5) (reduced swing) t plh propagation delay 0.65 1.70 0.65 1.80 0.70 1.80 ns t phl data to output figures 1, 2 t tlh transition time 0.35 1.10 0.35 1.10 0.35 1.10 ns t thl 20% to 80%, 80% to 20% t plh propagation delay 0.70 1.50 0.80 1.60 0.90 1.80 ns plcc only t phl data to output t oshl maximum skew common edge plcc only output-to-output variation 280 280 280 ps (note 6)(note 7) data to output path t oslh maximum skew common edge plcc only output-to-output variation 330 330 330 ps (note 6)(note 7) data to output path t ost maximum skew opposite edge plcc only output-to-output variation 330 330 330 ps (note 6)(note 7) data to output path t ps maximum skew plcc only pin (signal) transition variation 320 320 320 ps (note 6)(note 7) data to output path
www.fairchildsemi.com 4 100314 industrial version plcc dc electrical characteristics (note 8) v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd, t c = ? 40 c to + 85 c note 8: the specified limits represent the ? worst case ? value for the parameter. since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. conditions for testing sho wn in the tables are cho- sen to guarantee operation under ? worst case ? conditions. plcc ac electrical characteristics v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd note 9: maximum toggle frequency at which v oh and v ol dc specifications are maintained. note 10: maximum toggle frequency at which outputs maintain 150 mv swing. symbol parameter t c = ? 40 ct c = 0 c to + 85 c units conditions min max min max v oh output high voltage ? 1085 ? 870 ? 1025 ? 870 mv v in = v ih (max) loading with v ol output low voltage ? 1830 ? 1575 ? 1830 ? 1620 mv or v il (min) 50 ? to ? 2.0v v ohc output high voltage ? 1095 ? 1035 mv v in = v ih loading with v olc output low voltage ? 1565 ? 1610 mv or v il (min) 50 ? to ? 2.0v v bb output reference voltage ? 1395 ? 1255 ? 1380 ? 1260 mv i vbb = ? 250 a v diff input voltage differential 150 150 mv required for full output swing v cm common mode voltage v cc ? 2.0 v cc ? 0.5 v cc ? 2.0 v cc ? 0.5 v v ih single-ended guaranteed high signal for all input high voltage ? 1115 ? 870 ? 1110 ? 870 mv inputs (with one input tied to v bb ) v bb (max) + v diff v il single-ended guaranteed low signal for all input low voltage ? 1830 ? 1535 ? 1830 ? 1530 mv inputs (with one input tied to v bb ) v bb (min) ? v diff i il input low current 0.50 0.50 av in = v il (min) i ih input high current 240 240 av in = v ih (max) , d a ? d e = v bb , d a ? d e = v il (min) i cbo input leakage current ? 10 ? 10 av in = v ee , d a ? d e = v bb d a ? d e = v il (min) i ee power supply current ? 60 ? 30 ? 60 ? 30 ma d a ? d e = v bb , d a ? d e = v il (min) symbol parameter t c = ? 40 ct c = + 25 ct c = + 85 c units conditions min max min max min max f maxfs toggle frequency 250 250 250 mhz (note 9) (full swing) f maxrs toggle frequency 700 700 700 mhz (note 10) (reduced swing) t plh propagation delay 0.65 1.70 0.65 1.80 0.70 1.80 ns figures 1, 2 t phl data to output t tlh transition time 0.20 1.40 0.35 1.10 0.35 1.10 ns t thl 20% to 80%, 80% to 20%
5 www.fairchildsemi.com 100314 test circuit note: v cc , v cca = + 2v, v ee = ? 2.5v l1 and l2 = equal length 50 ? impedance lines r t = 50 ? terminator internal to scope decoupling 0.1 f from gnd to v cc and v ee all unused outputs are loaded with 50 ? to gnd c l = fixture and stray capacitance 3 pf figure 1. ac test circuit switching waveforms figure 2. propagation delay and transition times
www.fairchildsemi.com 6 100314 physical dimensions inches (millimeters) unless otherwise noted 24-lead small outline integrated circuit (soic), jedec ms-013, 0.300 wide package number m24b 24-lead plastic dual-in-line package (pdip), jedec ms-010, 0.400 wide package number n24e
7 www.fairchildsemi.com 100314 low power quint differential line receiver physical dimensions inches (millimeters) unless otherwise noted (continued) 28-lead plastic lead chip carrier (plcc), jedec mo-047, 0.450 square package number v28a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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